XCENA Secures $135 Million to Tackle AI Memory Bottlenecks and Cut Infrastructure Costs

South Korean AI chip startup XCENA has raised $135 million in Series B funding to develop memory-centric AI chips designed to reduce data movement, improve inference performance, and lower data centre costs.

May 31, 2026 - 10:11
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XCENA Secures $135 Million to Tackle AI Memory Bottlenecks and Cut Infrastructure Costs
IMAGE CREDITS: XCENA

Every time a user submits a query to ChatGPT, a complex chain of data movement takes place behind the scenes. Information is transferred from memory to a CPU for preprocessing, then sent to a GPU for intensive computation, before being routed back again. This process repeats continuously as the AI generates each word of a response.

That workflow creates a fundamental bottleneck, requiring data to move repeatedly through some of the most expensive and energy-intensive hardware in modern computing. XCENA, a startup operating in both South Korea and the United States, is aiming to eliminate much of that inefficiency. The four-year-old company has developed a chip that places processing capabilities much closer to DRAM, the high-speed memory used to store data actively being accessed by a processor. By handling routine data tasks near memory, the system reduces the need for constant communication between CPUs, GPUs, and memory modules.

If the technology proves effective at scale, it could significantly reduce the cost of AI infrastructure, helping to explain why investors are showing strong interest in the company. XCENA recently secured $135 million in a Series B funding round at a $570 million valuation, bringing its total capital raised to $185 million.

XCENA CEO Jin Kim launched the company in 2022 alongside CTO Dohun Kim and CPO Harry Juhyun Kim. All three founders previously worked at Samsung and SK Hynix, the memory chip manufacturers whose products are widely used alongside Nvidia’s GPUs. “CPUs and GPUs have both become increasingly sophisticated over the years. Memory hasn’t evolved in the same way. XCENA wants to change that,” Jin Kim said. “The recent increase in memory prices and related stock performance reflects a broader transition in AI infrastructure toward memory-centric architectures,” he added. Earlier this month, Samsung, SK Hynix, and Micron—the three companies that dominate the global memory chip industry—each surpassed a trillion-dollar valuation for the first time.

Kim said XCENA’s strategy is based on the belief that inference is no longer solely a compute challenge but increasingly a memory-scaling challenge.

The company’s MX1 chip connects directly to CPUs via CXL (Compute Express Link), a high-speed link between processors and memory. Rather than moving data away from memory for processing, the chip performs many operations before the data ever leaves the memory module. In effect, XCENA is bringing computation to the data itself. The company claims that every time a user submits a query to ChatGPT, a complex chain of data movement takes place behind the scenes. Information is transferred from memory to a CPU for preprocessing, then sent to a GPU for intensive computation, before being routed back again. This process repeats continuously as the AI generates each word of a response.

That workflow creates a fundamental bottleneck, requiring data to move repeatedly through some of the most expensive and energy-intensive hardware in modern computing. XCENA, a startup operating in both South Korea and the United States, is aiming to eliminate much of that inefficiency. The four-year-old company has developed a chip that places processing capabilities much closer to DRAM, the high-speed memory used to store data actively being accessed by a processor. By handling routine data tasks near memory, the system reduces the need for constant communication between CPUs, GPUs, and memory modules.

If the technology proves effective at scale, it could significantly reduce the cost of AI infrastructure, helping to explain why investors are showing strong interest in the company. XCENA recently secured $135 million in a Series B funding round at a $570 million valuation, bringing its total capital raised to $185 million.

XCENA CEO Jin Kim launched the company in 2022 alongside CTO Dohun Kim and CPO Harry Juhyun Kim. All three founders previously worked at Samsung and SK Hynix, the memory chip manufacturers whose products are widely used alongside Nvidia’s GPUs. “CPUs and GPUs have both become increasingly sophisticated over the years. Memory hasn’t evolved in the same way. XCENA wants to change that,” Jin Kim said. “The recent increase in memory prices and related stock performance reflects a broader transition in AI infrastructure toward memory-centric architectures,” he added. Earlier this month, Samsung, SK Hynix, and Micron—the three companies that dominate the global memory chip industry—each surpassed a trillion-dollar valuation for the first time.

Kim said XCENA’s strategy is based on the belief that inference is no longer solely a compute challenge but increasingly a memory-scaling challenge.

The company’s MX1 chip connects directly to CPUs via CXL (Compute Express Link), a high-speed link between processors and memory. Rather than moving data away from memory for processing, the chip performs many operations before the data ever leaves the memory module. In effect, XCENA is bringing computation to the data itself. The company claims that a single system could handle workloads that previously required 10 servers.

“While GPUs are exceptionally good at matrix multiplication, which powers AI model training, much of the surrounding orchestration work—including preprocessing, KV cache management, and data caching—still depends on CPUs,” Kim explained. “Our chip performs those tasks directly inside the memory module.”

Interest in memory-focused technologies has increased significantly since the latter half of last year, and XCENA believes current market conditions are favourable for its approach.

Kim confirmed that discussions are underway with several major global memory suppliers, although he declined to identify them. The company’s target customers are hyperscale operators investing tens of billions of dollars annually in AI infrastructure,  for whom even modest improvements in memory efficiency could translate into savings of hundreds of millions of dollars.

At present, the MX1 remains in the prototype stage. XCENA expects mass-production versions of the chip to begin rolling off Samsung’s foundry production lines by the end of 2026, with commercial revenue anticipated to begin in 2027.

While developers of neural processing units (NPUs) are focused on challenging Nvidia’s dominance in AI training workloads, XCENA is concentrating on the memory-intensive layer that supports the entire ecosystem.

Among XCENA’s closest competitors are Astera Labs and Marvell, two publicly traded companies developing advanced memory connectivity technologies. According to Kim, Marvell is an established player operating in a similar area, but XCENA’s differentiation lies in its intellectual property. “We have thousands of cores,” Kim said. Based on publicly available specifications, he noted that Marvell’s architecture relies on a comparatively small number of general-purpose cores.

Those cores are built using RISC-V, an open-source processor architecture, and are specifically optimised for data-processing workloads while remaining compact and efficient. Beyond the processor cores themselves, XCENA develops its own memory hierarchy, interconnect bus, and DRAM controller internally, a degree of vertical integration that many chipmakers, including larger competitors, often outsource.

The Series B financing was co-led by Seoul-based venture capital firms Atinum and IMM Investment, alongside Corstone Asia and existing investors SBI Investment and Mirae Asset Capital. XCENA currently employs more than 90 people across its offices in Pangyo, South Korea’s technology hub, and Sunnyvale, California. The company is also holding discussions with international investors regarding additional funding opportunities. A single system could handle workloads that previously required 1010 servers.

“While GPUs are exceptionally good at matrix multiplication, which powers AI model training, much of the surrounding orchestration work—including preprocessing, KV cache management, and data caching—still depends on CPUs,” Kim explained. “Our chip performs those tasks directly inside the memory module.”

Interest in memory-focused technologies has increased significantly since the latter half of last year, and XCENA believes current market conditions are favourable for its approach.

Kim confirmed that discussions are underway with several major global memory suppliers, although he declined to identify them. The company’s target customers are hyperscale operators investing tens of billions of dollars annually in AI infrastructure, for whom even modest improvements in memory efficiency could translate into savings of hundreds of millions of dollars.

At present, the MX1 remains in the prototype stage. XCENA expects mass-production versions of the chip to begin rolling off Samsung’s foundry production lines by the end of 2026, with commercial revenue anticipated to begin in 2027.

While developers of neural processing units (NPUs) are focused on challenging Nvidia’s dominance in AI training workloads, XCENA is concentrating on the memory-intensive layer that supports the entire ecosystem.

Among XCENA’s closest competitors are Astera Labs and Marvell, two publicly traded companies developing advanced memory connectivity technologies. According to Kim, Marvell is an established player operating in a similar area, but XCENA’s differentiation lies in its intellectual property. “We have thousands of cores,” Kim said. Based on publicly available specifications, he noted that Marvell’s architecture relies on a comparatively small number of general-purpose cores.

Those cores are built on RISC-V, an open-source processor architecture, and are optimised for data-processing workloads while remaining compact and efficient. Beyond the processor cores themselves, XCENA develops its own memory hierarchy, interconnect bus, and DRAM controller internally, a degree of vertical integration that many chipmakers, including larger competitors, often outsource.

The Series B financing was co-led by Seoul-based venture capital firms Atinum and IMM Investment, alongside Corstone Asia and existing investors SBI Investment and Mirae Asset Capital. XCENA currently employs more than 90 people across its offices in Pangyo, South Korea’s technology hub, and Sunnyvale, California. The company is also holding discussions with international investors regarding additional funding opportunities.

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Shivangi Yadav Shivangi Yadav reports on startups, technology policy, and other significant technology-focused developments in India for TechAmerica.Ai. She previously worked as a research intern at ORF.